View IMISM532_4910485.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

+/+
FEATURES
* * * * * * * * * * * * *
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Spectrum Spread Clock
APPLICATIONS
* * * * * * * * Desktop/Laptop Computer Modems Scanners, Printers, Copiers, Fax Machines, MFP's Disk and CD-ROM Drives Automotive and EmbeddedSystems Networking, LAN/WAN Digital Cameras, Games LCD displays
Approved Product
Reduces Systemic EMI. Modulates external source clock. 3 - 5 Volt power supply. 14 to 120 MHz.operating frequency range. Output is multiplied or divided by 1, 2 or 4. Digitally controlled modulation. TTL/CMOS compatible outputs. Fout modulation centered around reference. Compliant with all major CISC, RISC and DSP processors. Low short term jitter. Synchronous output enable. Power down mode for low current operation. Available in 16 pin SOIC package.
BENEFITS
* * * * * Time to Market Lower cost of compliance Programmable EMI reduction No degradation in Rise/Fall times Lower component and PCB layer count
GENERAL DESCRIPTION
The IMI SM532 is a Spectrum Spread Clock Modulator designed for the purpose of reducing the Electro- Magnetic Interference (EMI) found in today's high speed digital systems. The SM532 is well suited for a wide range of digital system applications that require a reduction of radiated energy. This unwanted radiated energy is usually found in the odd harmonics of digital system clocks. By modulating the frequency of the digital clock, measured EMI at the fundamental and harmonic frequencies is greatly reduced. This reduction in radiated energy can significantly reduce the cost of complying with regulatory requirements and time to market, without degrading clock and timing signals. The IMI SM532 is extremely versatile and flexible in that program control is available for each of the operating modes. Program control is provided for Input Frequency, Output Frequency Multiplication, Output Bandwidth, Modulation ON/OFF and Fout state during Power Down Mode. Depending on the range of operation, the output clock, Fout, can be a multiple (1, 2, 4) or a division (1, 1/2, 1/4) of the input frequency. The power-down mode adds the flexibility of operating in a completely static mode for reduced standby current and simplified system board testing. There are many benefits to using the SM532 Low EMI Clock Modulator. The most important benefit is reducing the amount of clock related EMI by as much as 12 - 18 dB, depending on the application. SM532 is available with only Center-Spread frequency modulation. Refer to SM530 for Down-Spread frequency modulation and other functions.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 1 of 14
+/+
S2 S3 R0 R1 OSCin OSCout 11 9 14 13 1 2
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
LF
Approved Product
SSON 8 SSCG and Power Down Control
5
Phase Detector
VCO
Divide by R
Divide by N 4 S0
Divide by 1, 2, 4 7 S1
12
Fout
Figure 1. Block Diagram
ORDERING INFORMATION
Part No. Package Operating Temperature Range
IMISM532AXB Marking Example: IMI SM532AXB Date Code, Lot#
16 Pin SOIC
0 C to 70 C
0
0
IMISM532AXB Flow B = Commercial, 0C to 70C Package X = SOIC Revisions IMI Device Number
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 2 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
1 2 3 4 5 6 7 8 16 15 14 DVDD DVSS R0 R1 Fout S2 DVDD S3
Approved Product
OSCin OSCout AVDD S0 LF AVSS S1 SSON
SM532
13 12 11 10 9
Figure 2. SOIC Package Pin Assignment
Pin Descriptions
Pin No. 1,2 Pin Name OSCin, OSCout I/O I/O TYPE CMOS Description Pins form an on-chip reference oscillator when connected to terminals of an external parallel resonant crystal. OSCin may be connected to a TTL/CMOS external clock source. AC coupling may be required. If OSCin is connected to an external clock other than a crystal, leave OSCout (pin 2) unconnected. The input frequency range is 14 to 120 Mhz @ 5.0 VDC. Analog circuit positive power supply. Input control used to select the frequency multiplication at Fout, relative to the reference clock. See table on page 5. S0 has internal pull-down resistor, S1 has internal pull-up resistor. Single ended tri-state output of the phase detector. A two pole passive loop filter is connected to LF. See table on page 7 for proper values. Analog circuit ground. Input control pin used to enable modulation at the Fout pin. SSON = 0 = Modulation ON. (default) SSON = 1 = Modulation OFF. Has internal pull-down resistor. Input control pins used to set the amount of modulation at Fout. See table on page 6 for settings. S2 has internal pull-up resistor, S3 has internal pull-down resistor. Digital positive power supply. Should be kept separate from analog power for best performance. Modulated clock output. Input pins control the input frequency range as described in table on page 5. R0 and R1 have internal pull-up resistor. Digital Circuit Ground Table 1.
3 4, 7
AVDD S0, S1
Power I
TTL
5
LF
O
Analog
6 8
AVSS SSON
Ground I
Ground TTL
9, 11
S3, S2
I
TTL
10, 16 12 13, 14
DVDD Fout R1, R0
Power O I
Power TTL TTL
15
DVSS
Ground
Ground
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 3 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
ABSOLUTE MAXIMUM RATINGS
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, precautions should be taken to avoid application of any voltage higher than the absolute maximum rated voltages to this circuit. For proper operation, Vin and Vout should be constrained to the range, VSS < ( Vin or Vout) < VDD. All digital inputs are tied high or low internally. Refers to electrical specifications for operating supply range. Item Symbol Min. Max. Units Supply Voltage VDD 0 6.0 VDC Input, relative to VSS VIRvss -0.3 VDD +0.3 VDC Output, relative to VSS VORvss -0.3 VDD +0.3 VDC AVDD relative to DVDD -100 +100 mv Vpp AVSS relative to DVSS -100 +100 mv Vss 0 Temperature, Operating TOP 0 + 70 C 0 Temperature, Storage TST - 65 + 150 C Table 2.
Electrical Characteristics
Characteristic Symbol Min. Typ. Max. Units Input Low Voltage VIL 0.8 Vdc Input High Voltage VIH 2.0 Vdc Input Low Current IIL 100 A Input High Current IIH 100 A Output Low Voltage IOL= 8mA, VDD = 5V VOL 0.4 Vdc Output High Voltage IOH = 8mA, VDD = 5V VOH VDD-1.0 Vdc Output Low Voltage IOL= 5mA, VDD = 3.3V VOL 0.4 Vdc Output High Voltage IOH = 3mA,VDD = 3.3V VOH 2.4 Vdc Input Capacitance (Pin-1) Cin1 3 pf Output Capacitance (Pin-2) Cin2 5 pf Pull-Up Resistor values (pins 7, 11,13 and 14) Rpu 100K 167K 300K Ohms Pull-Down resistor values (pins 4, 8 and 9) Rpd 150K 250K 350K Ohms Tri-State Leakage Current (pins 5 and 12) IOZ 5.0 A Static Supply Current (Power Down mode) IDD 250 A 5 Volt Dynamic Supply Current ICC 25 30 ma (Operating mode) 3 Volt Dynamic Supply Current ICC 18 20 ma (Operating mode) Short Circuit Current (Fout) ISC 30 ma Test measurements performed at VDD = 3.3V +/-5% and 5V +/-10%, TA = 0C to 70C Table 3.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 4 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Symbol tTLH tTHL tTLH tTHL tTLH tTHL tTLH tTHL TsymF1 Min 3.3 2.1 0.7 0.6 4.8 2.9 1.6 1.1 45 Typ 3.5 2.3 0.75 0.7 5.0 3.2 1.75 1.3 50 Max 3.8 2.5 0.8 0.8 5.4 3.4 1.9 1.5 55 Units ns ns ns ns ns ns ns ns %
Approved Product
Timing Characteristics
Characteristic Output Rise Time Measured at 10% - 90% @ 5 VDC Output Fall Time Measured at 10% - 90% @ 5 VDC Output Rise Time Measured at 0.8V - 2.0V @ 5 VDC Output Fall Time Measured at 0.8V - 2.0 V @ 5 VDC Output Rise Time Measured at 10% - 90% @ 3.3 VDC Output Fall Time Measured at 10% - 90% @ 3.3 VDC Output Rise Time Measured at 0.8V - 2.0V @ 3.3 VDC Output Fall Time Measured at 0.8V - 2.0 V @ 3.3 VDC Output Duty Cycle
Peak-to Peak Jitter One Sigma (SSON = 1) tj1s 250 500 ps Measurements performed at VDD = 3.3V +/-5% and 5V +/-10%, TA = 0C to 70C, CL = 15pF, Fout = 50.0 MHz. Table 4.
FREQUENCY SELECTION TABLE
The following table provides the necessary information for setting the control lines for proper operation of the SM532 and for any frequency within its operating range. Note that the table includes operating frequencies at 3.3 and 5.0 VDC. The 3.3 VDC columns are lower in frequency than the 5.0 VDC operation due to the characteristics of the VCO. VDD = 5 Fin (Range) (MHz) MIN MAX See 14 30 14 30 14 30 30 30 30 60 60 60 60 60 60 120 120 120 Volts Fout/ Fin X Note 1 2 4 0.5 1 2 +/- 10% Fout (Range) (MHz) MIN MAX 14 28 56 15 30 60 30 60 120 30 60 120 VDD = 3.3 Fin (Range) (MHz) MIN MAX See 14 22.5 14 22.5 14 22.5 25 25 25 45 45 45 Volts Fout/ Fin X Note 1 2 4 0.5 1 2 +/- 5% Fout (Range) (MHz) MIN MAX 14 28 56 12.5 25 50 12.5 25 50 22.5 45 90 22.5 45 90 22.5 45 90
Multiplier Settings S1 S0 0 0 0 1 1 0 1 1 0 1 1 1 0 1
Input Range Settings R1 R0 X X 0 1 0 1 0 1 1 1 1 0 0 0
0.25 15 30 0 1 1 1 50 90 0.25 0.5 30 60 1 0 1 1 50 90 0.5 1 60 120 1 1 1 1 50 90 1 Note: Selects Power Down state, see table 7. X = don't care condition. Table 5. Frequency Selection Table
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 5 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
MODULATION AND POWER DOWN SELECTIONS
The bandwidth of the modulation applied to Fout is controlled by two input control lines, S2 and S3. Also, S2 and S3 control the state the SM532 will go to when the Power Down mode is selected. The Power Down mode is selected when both S0 and S1 are set to a logic state 0. Refer to the tables below for the proper selection of Modulation Bandwidth and Power Down state. Modulation Selection Table Control Settings Spread Percentage S3 S2 Low High 0 0 99.375 % 100.625% 0 1 98.75 % 101.25 % 1 0 97.50 % 102.50 % 1 1 95.00 % 105.00 % Table 6. Modulation Selection Table Power Down Selection Table Fout State S0 S1 S2 Factory Test 0 0 0 Hi-Z 0 0 1 0 0 0 0 1 0 0 1 Table 7. Power Down Selection Table
Total Bandwidth 1.25 % 2.50 % 5.00 % 10.0 %
S3 1 1 0 0
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 6 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Loop Filters
Approved Product
The SM532 requires an external loop filter to provide the proper operation and modulation profile for a given input frequency. The loop filter is connected to pin 5 (LF) of the SM532 and is a typical 2 pole low pass filter. Since the SM532 operates over such a wide range of frequencies, the loop filter will change depending on the frequency of operation. The following loop filter values are recommended for best performance and modulation profile at 3.0 volts and 5.0 volts VDD. Operating voltage is measured at the VDD pin of the SM532. Notice that the selection of Loop Filter values only depends on the input frequency and VDD voltage, and
LF #1 LF
R1 1 K ohm C7 1,000 pF C6 10,000 pF
LF #2 LF
R1 1.5 K ohm C7 680 pF C6 6,800 pF
LF #3 LF
R1 2 K ohm C7 390 pF C6 3,900 pF
does not depend on the R and S settings. Figure 3. Recommended Loop Filters
Recommended Loop Filter Values
Input Range Low Middle High Input Range Low Low Low Middle Middle Middle High High High VDD +/-5% 3.3 3.3 3.3 VDD +/-10% 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 Input Frequency Range (MHz) 14.0 to 22.5 25.0 to 45.0 50.0 to 90.0 Input Frequency Range (MHz) 14.0 to 19.9 20.0 to 24.9 25.0 to 29.9 30.0 to 39.9 40.0 to 49.9 50.0 to 59.9 60.0 to 79.9 80.0 to 99.9 100.0 to 120.0 Table 8 The component values listed in Table 8 are recommended values using commonly manufactured components. Note that there are actually 3 different sets of loop filter values. Due to the VCO characteristics, the table is divided in to 3 volt operation and 5 volt operation. Referring to the table above, it is apparent that one set of loop filter values is all that is needed in the 3 volt operation. In the 5 volt operation, each input operating range is divided into 3 sections which require a different loop filter for optimal performance. The best loop filter for any application is the one that, provides the greatest EMI reduction, maintains system integrity, has a modulation profile shown on page 7 and uses commonly available components.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com 8/31/98 Rev. 1.4 Page 7 of 14
R1 (K) 1.0 1.0 1.0 R1 (K) 1.0 1.5 2.0 1.0 1.5 2.0 1.0 1.5 2.0
C6 (pF) 10,000 10,000 10,000 C6 (pF) 10,000 6,800 3,900 10,000 6,800 3,900 10,000 6,800 3,900
C7 (pF) 1,000 1,000 1,000 C7 (pF) 1,000 680 390 1,000 680 390 1,000 680 390
Loop Filter # 1 1 1 Loop Filter # 1 2 3 1 2 3 1 2 3
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
SSCG Modulation Profile
The modulation rate of the SM532 within any range is typically 20 - 40 kHz. With the correct loop filter connected to pin 5, the following profile will provide the best EMI reduction. This profile can be seen on a Time Domain
Fmax
50.625
50.468 +1.25% 50.312
Fout Freq. (MHz)
50.156
Fcenter
50.000
2.5%
49.844
49.687 -1.25% 49.531
Fmin
49.375
0
5
10
15 20 25 Time (microseconds)
30
35
Analyzer. Figure 4. Modulation Profile
THEORY OF OPERATION
The SM532 is a Phase Lock Loop (PLL) type clock generator using Direct Digital Synthesis (DDS). By precisely controlling the bandwidth of the output clock, the SM532 becomes a Low EMI clock generator. The theory and detailed operation of the SM532 will be discussed in the following sections.
EMI All digital clocks generate unwanted energy in their harmonics. Conventional digital clocks are square waves with a duty cycle that is very close to 50 %. Because of the 50/50 duty cycle, digital clocks generate most of their rd th th harmonic energy in the odd harmonics, i.e.; 3 , 5 , 7 etc. It is possible to reduce the amount of energy contained in the fundamental and harmonics by increasing the bandwidth of the fundamental clock frequency. Conventional digital clocks have a very high Q factor, which means that all of the energy at that frequency is concentrated in a very narrow bandwidth, consequently, higher energy peaks. Regulatory agencies test electronic equipment by the amount of peak energy radiated from the equipment. By reducing the peak energy at the fundamental and harmonic frequencies, the equipment under test is able to satisfy agency requirements for Electro-Magnetic Interference (EMI). Conventional methods of reducing EMI have been to use shielding, filtering, multi-layer PCB's etc. The SM532 uses the approach of reducing the peak energy in the clock by increasing the clock bandwidth, and lowering the Q.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 8 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
SSCG SSCG uses a patented technology of modulating the clock over a very narrow bandwidth and controlled rate of change, both peak and cycle to cycle. The SM532 takes a narrow band digital reference clock in the range of 14 120 MHz and produces a clock that sweeps between a controlled start and stop frequency and precise rate of change. The bandwidth of the output clock is programmable. Using two control lines on the SM532, the bandwidth of the modulated clock can be controlled over four descrete settings, 1.25, 2.50, 5.0 and 10%. To understand what happens to an SSCG clock, consider that we have a 50 MHz clock with a 50 % duty cycle. From a 50 MHz clock we know the following;
Clock Frequency = Fc = 50 MHz. Clock Period = Tc = 1/50 MHz = 20 ns.
50 %
50 %
Tc = 20 ns.
Figure 5. Unmodulated Clock
Consider that this 50 MHz clock is applied to the OSCin input of the SM532, either as an externally driven clock or as the result of a parallel resonant crystal connected to pins 1 and 2 of the SM532. Also consider that the SM532 is programmed for the following operation; Range (R0, R1) = 0, 1 Mid Range Multiplier (S0, S1) = 0, 1 X1 D_C = 1 Center Spread SSON = 1 Modulation is OFF % Modulation (S2, S3) = 1, 0 2.50 % Spread From the above parameters, the output clock at Fout will be 50.625 MHz. frequency of Fout will always rest at the high end of the programmed spectrum. In this case, +1.25 % of 50 MHz is .625 MHz, equals 50.625 MHz. When modulation is turned ON, the clock at Fout begins sweeping downward to the minimum extreme of -1.25 % of 50 MHz which is 50 MHz .625 MHz = 49.375 MHz. When the clock reaches 49.375, the SM532 begins sweeping back up to the maximum extreme of 50.625 MHz. If we were to look at this clock on a spectrum analyzer we would see the picture in figure 6. Keep in mind that this is a drawing of a perfect clock with no noise. We see that the original 50 MHz reference clock is at the Center frequency, Cf, and the minimum and maximum extremes are positioned symmetrically about the center frequency. This type of modulation is called CenterSpread. Note that when modulation is turned off, the Fout clock is at the maximum extreme of the bandwidth. With modulation turned off, the
49.375 MHz min. 50.00MHz Center 50.625 MH max. Modulation Off.
Figure 6.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 9 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
Figure 7 shows the clock from figure 6, as displayed on an oscilloscope. Modulation can be seen as the rising and falling edges of the clock moving back and forth in time.
Tc = 19.75 ns.
Tc = 20.202 ns.
Figure 7. Period Comparison Chart There are certain cases where center spread modulation is not applicable. If the maximum design frequency of the intended application is 50 MHz and becomes unstable above 50 MHz, then increasing the clock to 50.625 MHz might cause unwanted system problems. To accommodate this situation, it is recommended that the SM530 be used in the Down Spread mode. Referring to figure 6, you will note that the peak amplitude of the 50 MHz non-modulated clock is higher than the wideband modulated clock. This difference in peak amplitudes between modulated and unmodulated clocks is the reason why SSCG clocks are so effective in digital systems. The illustration in figure 6 refers to the fundamental clock frequency. A very important characteristic of the SSCG clock is that the bandwidth of the harmonics is multiplied by the harmonic number. In other words, if the bandwidth of a 50 MHz clock is 1.35 MHz, the bandwidth rd of the 3 harmonic will be 3 times 1.35, or 4.05 MHz. The amount of bandwidth is relative to the amount of peak energy in the clock. Consequently, the wider the bandwidth, the greater the energy reduction of the clock. Most applications will not have a problem meeting agency specifications at the fundamental frequency. It is the higher harmonics that usually cause the most problems. With an SSCG clock, the bandwidth and peak energy reduction th increases with the harmonic number. Consider that the 11 harmonic of our 50 MHz clock is 550 MHz. With a th total spread of 1.35 MHz at 50 MHz, the spread at the 11 harmonic would be 14.85 MHz which greatly reduces the peak energy content. It is typical to see as much as 12 or 18 dB. of reduction at the higher harmonics, due to a modulated clock.Referring to figure 6, you can see that the peak amplitude of the non-modulated clock is much higher than the peak amplitude of the modulated clock. This is the reason the SM532 is used for EMI reduction. The amount of EMI reduction is dependent on the application. The difference in the peak energy of the modulated clock and the non-modulated clock in typical applications will see a 2 - 3 dB. reduction at the fundamental and as rd th th much as 8 - 10 dB. reduction at the intermediate harmonics, 3 , 5 , 7 etc. At the higher harmonics, it is quite possible to reduce the peak harmonic energy, compared to the unmodulated clock, by as much as 12 - 18 dB. The dB reduction for a give frequency and spread can be calculated using a simple formula. This formula is only helpful in determining a relative dB reduction for a given application. This formula assumes an ideal clock with 50% duty cycle and therfore only predicts the EMI reduction of even harmonics. Other circumstances such as non-ideal clock and noise will affect the actual dB reduction. The formula is as follows; dB = 6.5 + 9(Log10(F)) + 9(Log10(P)) Where; F = Frequency in Mhz, P = total % spread (2.5% = .025) Using a 50 Mhz clock with a 2.5% spread, the theoretical dB reduction would be; db @ 50 MHz (Fund) = 6.5 + 15.29 - 14.42 = 7.37 dB @ 150 MHz (3rd) = 6.5 + 19.58 - 14.42 = 11.66 dB @ 550 MHz (11th) = 6.5 + 24.66 - 14.42 = 16.74
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com 8/31/98 Rev. 1.4 Page 10 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Modulation Profile
Approved Product
The SM532 moves from max. to min. frequencies of its bandwidth at a pre-determined rate and profile. The modulation frequency is determined by the input frequency and an internal divider. All 3 operating ranges modulate the Fout clock at from 20 to 40 kHz. The three operating ranges are 14 - 30 MHz, 30 - 60 MHz and 60 to 120 MHz. If OSCin = 15 MHz, the modulation rate is 20 kHz. If OSCin is 60 MHz, in mid-range, the modulation rate would be 40 kHz. To provide the proper modulation rate the input reference frequency is divided by a fixed number in each range. The input reference frequency is divided by 750 in Low Range, 1500 in Mid Range and 3000 in the High Range. From these numbers, the modulation rate can be determined for any input frequency. Example: OSCin = 45.378 MHz, Input Range = Mid, Input divisor = 1500 Fmod = OSCin /1500 Fmod = 30.252 kHz If you have a clock frequency that was on the boundary of the Mid-range and the High range of operation, the choice of selecting which range to use would be determined by which modulation rate is desired. If you choose the Mid-range, the modulation rate would be 40 kHz, while choosing the High range would yield a 20 kHz modulation rate. There is some operational overlap between ranges, such that 58 MHz in the Mid-Range would give the same results as 58 MHz in the High-Range, except for the modulation rate. This type of operation is not recommended unless it is thoroughly tested. The modulation profile of the SM532 is not a linear sweep from max to min and back. The OSCin reference clock determines the modulation frequency but the internal SSCG control logic determines the actual modulation profile. The modulation profile can best be described by comparing the instantaneous frequency at Fout with time. The illustration in figure 9 below is a representation of the modulation profile of the SM532 as displayed on a Time Domain Analyzer.
Fmax
50.625 50.468 +1.25% 50.312
Fout Freq. (MHz)
50.156 50.000 49.844 49.687
Fcenter
2.5%
-1.25% 49.531
Fmin
49.375
0
5
10
15 20 25 Time (microseconds)
30
35
Figure 8. Frequency Profile in Time Domain
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 11 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
As can be seen from the figure above, the Fout/Time profile progresses through frequencies depending on where it is in the sweep. If the frequency is in the middle of the sweep, the rate of change is slower compared to the rate at the extremes of the band. When the frequency is nearing the end of the band, it is moving through these frequencies faster, since it has to sweep through these same frequencies again after reversing direction. This modulation profile is one of the key elements to the SM532. Using a linear sweep through all frequencies would not give as good of results in EMI reduction.
APPLICATION NOTES AND SCHEMATICS
The schematic figure shown below is a simple minimum component application example of an SM532 design. In the case shown below, the control lines are configured for the following parameters; Input Frequency: Mid-Range Multiplier: X1 Modulation: 2.50% Refer to loop filter values on Table 8, for operation at 3.3 Volts DC. * L1 and C4 are required when Y1 is a 3rd. overtone crystal.
VCC = 3.3 VDC R2 VDD 10 ohm. C1 22 uf. C2 0.1 uf. 16 10 3 C3 0.1 uf.
SSON: On
Y1 L1
50 MHz DVDD DVDD AVDD 1 OSCin OSCout
*
C4 .033 uf.
2
330 nh.
*
27 pf. C5 27 pf. C8 14 VDD 13 4 7 11 9 8 Fout R0 R1 S0 S1 S2 S3 LF 5 SSON DVSS 15 AVSS 6 12
SM532
Modulated Clock Output
R1 1K
C6 10,000 pf.
C7 1000 pf.
Figure 9. Application Schematic The SM532 has an internal Analog Power and Ground and a Digital Power and Ground. In the example above, the digital and analog circuits are connected together. If noise is a concern, it is recommended that the Analog and Digital Power and Grounds be separated. The loop filter shown above is recommended for operation at 3.14 3.47 VDC. This filter can also be used in 5.0 VDC operations when operating in the low frequency end of each of the three input frequency ranges. Refer to table 8 on page 6 for complete information. Also note, the crystal, Y1, is a third overtone 50 Mhz crystal, which requires an inductor and decoupling capacitor to OSCout.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 12 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
.
Approved Product
Figure 10 shows the internal oscillator equivalent circuit for the SM532.
250 K
Xin
1 3 pF
1
2
.
Xout
2 5 pF
.
Figure 10. Internal Oscillator Equivalent Circuit
PCB Layout Example
The SM532 Spectrum Spread Clock is a PLL type hybrid circuit. This means that is contains both digital and analog circuits on the same die. The Phase Detector, Loop Filter and VCO are analog circuits that must operate in a very low noise environment for best performance. There are several ways to keep this noise to a minimum, such as bypass capacitors on all power pins and separating the analog and digital power and ground planes. The figure below uses the first approach of placing bypass capacitors as close to every power pin as possible. In addition, all ground pins should be connected directly to the ground plane with little or no trace length. Note also that only the power and ground circuits of the SM532 have been shown. Other circuits such as the Loop Filter components must be located as close to the Loop Filter pin as possible, for best performance.
VSS 22 uf. 10 ohm VCC
Pin 1
0.1 uf. VSS
VSS
VSS
0.1 uf.
VSS 0.1 uf. VSS
Figure 11. SM532 Single Power Plane PCB Layout
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 13 of 14
+/+
YJGP YJGP VKOKPI KU ETKVKECN
SM532
Low EMI Sprectum Spread Clock
Approved Product
Package Dimensions and Drawings
16 PIN SOIC DIMENSIONS
INCHES SYMBOL C L E H A A1 A2 B C D D A2 A1 B e A
a
MILLIMETERS MAX 0.104 0.0115 0.094 0.019 0.0125 0.412 0.299 MIN 2.46 0.127 2.29 0.35 0.23 10.21 7.42 NOM 2.56 0.22 2.34 0.41 0.25 10.34 7.52 0.127 BSC 0.410 0.040 8 10.16 0.61 0 10.31 0.81 5 10.41 1.02 8 MAX 2.64 0.29 2.39 0.48 0.32 10.46 7.59
MIN 0.097 0.0050 0.090 0.014 0.0091 0.402 0.292
NOM 0.101 0.009 0.092 0.016 0.010 0.407 0.296 0.050 BSC
E e H L a
0.400 0.024 0
0.406 0.032 5
NOTES:
Disclaimer
International Microcircuits, Inc, reserves the right to change or modify the information contained in this data sheet, without notice. International Microcircuits, Inc., does not assume any liability arising out of the application or use of any product or circuit described herein. International Microcircuits, Inc., does not convey any license under its patent rights nor the rights of others. International Microcircuits, Inc. does not authorize its products for use as critical components in life-support systems or critical medical instruments, where a malfunction or failure may reasonably be expected to result in significant injury to the user.
International Microcircuits,Inc. 525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571 http:/www.imicorp.com
8/31/98 Rev. 1.4 Page 14 of 14

▲Up To Search▲

Price & Availability of IMISM532

	To Download IMISM532 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .